{"id":4239,"date":"2020-09-15T10:45:40","date_gmt":"2020-09-15T10:45:40","guid":{"rendered":"https:\/\/machinalogic.com\/dese_staging1\/?page_id=4239"},"modified":"2020-09-21T15:28:58","modified_gmt":"2020-09-21T15:28:58","slug":"m-tech-micro","status":"publish","type":"page","link":"https:\/\/machinalogic.com\/dese_staging1\/degree-programs\/m-tech-micro\/","title":{"rendered":"M.Tech. (Micro)"},"content":{"rendered":"<div class=\"wpb-content-wrapper\"><p>[vc_row][vc_column][vc_column_text]<\/p>\n<h3 style=\"text-align: center;\">Departments of Electronic Systems Engineering and Electrical Communication Engineering<\/h3>\n<h3 style=\"text-align: center;\">MTech Microelectronics and VLSI Design (2020 Batch onwards)<\/h3>\n<p>&nbsp;<\/p>\n<ol>\n<li><strong><span style=\"color: #000000;\">Core Courses (18 credits):<\/span><\/strong> There are 6 courses that are mandatory for MTech students.<\/li>\n<li><strong><span style=\"color: #000000;\">Electives (18 credits):<\/span><\/strong> The remaining 18 credits of coursework may be completed by crediting courses listed in the Scheme of Instructions.<\/li>\n<li><strong><span style=\"color: #000000;\">Project (28 credits)<\/span><\/strong><\/li>\n<\/ol>\n<p>&nbsp;<\/p>\n<table style=\"color: #000000; border-collapse: collapse;\" width=\"100%\" cellspacing=\"0\" cellpadding=\"0\">\n<tbody>\n<tr style=\"background-color: #0296d3; color: #ffffff; font-size: 18px;\">\n<td width=\"23\"><strong>#<\/strong><\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\"><strong>Course No. <\/strong><\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\"><strong>Credits<\/strong><\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\"><strong>Course title<\/strong><\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\"><strong>Faculty<\/strong><\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\"><strong>Nature<\/strong><\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\"><strong>Term<\/strong><\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">1<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E0 284<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Digital VLSI Circuit<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Chetan Singh Thakur<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Core<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 200<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">1:2<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Microelectronics Lab<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Mayank Shrivastava<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Core<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan\/Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 220<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Foundations of Nanoelectronics Devices<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Kausik Majumdar<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Core<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">4<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 231<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Digital Systems Design with FPGAs<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Kuruvilla Varghese<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Core<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">5<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 238<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Analog VLSI Circuits<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Gaurab Banerjee<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Core<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">6<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 282<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Basics of Semiconductor Devices and Technology<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Mayank Shrivastava<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Core<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">7<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E1 201<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Hardware Acceleration and Optimization for Machine Learning<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Chetan Singh Thakur<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">8<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 225<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Art of Compact Modelling<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Santanu Mahapatra<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">9<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 237<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Integrated Circuits for Wireless Communication<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Gaurab Banerjee<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a010<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 245<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Processor System Design<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Kuruvilla Varghese<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">11<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 271<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">1:2<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Reliability of Nanoscale Circuits and Systems<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Mayank Shrivastava<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">12<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 274<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">1:2<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Design of Power Semiconductor Devices<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Mayank Shrivastava<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">13<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 275<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Physics and Design of Transistors<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Mayank Shrivastava<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">14<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 280<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Carrier Transport in Nanoelectronics Devices<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Kausik Majumdar<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">15<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E3 301<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Special topics in Nanoelectronics<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Mayank Shrivastava<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">16<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E7 211<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Photonic Integrated Circuits<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">T. Srinivas \/ Varun Raghunathan<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">17<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E7 214<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Optoelectronic Devices<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Varun Raghunathan<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">18<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E8 202<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Computational Electromagnetics<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">K. J. Vinoy \/ Dipanjan Gope<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Aug<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">19<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E8 242<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">2:1<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">RF IC and Systems<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">K. J. Vinoy<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 23px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">20<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">\u00a0E8 262<\/td>\n<td style=\"width: 47px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">3:0<\/td>\n<td style=\"width: 280px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">CAD for High Speed Chip-Package-Systems<\/td>\n<td style=\"width: 105px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Dipanjan Gope<\/td>\n<td style=\"width: 51px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Elective<\/td>\n<td style=\"width: 49px; height: 47px; border: 1px solid #b2b2b2; padding: 4px;\" valign=\"middle\">Jan<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>[\/vc_column_text][\/vc_column][\/vc_row]<\/p>\n<\/div>","protected":false},"excerpt":{"rendered":"<p>[vc_row][vc_column][vc_column_text] Departments of Electronic Systems Engineering and Electrical Communication Engineering MTech Microelectronics and VLSI Design (2020 Batch onwards) &nbsp; Core Courses (18 credits): There are 6 courses that are mandatory for MTech students. Electives (18 credits): The remaining 18 credits of coursework may be completed by crediting courses listed in the Scheme of Instructions. Project [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":4226,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"full-page.php","meta":{"qubely_global_settings":"","qubely_interactions":"","footnotes":""},"class_list":["post-4239","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/pages\/4239","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/comments?post=4239"}],"version-history":[{"count":1,"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/pages\/4239\/revisions"}],"predecessor-version":[{"id":4246,"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/pages\/4239\/revisions\/4246"}],"up":[{"embeddable":true,"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/pages\/4226"}],"wp:attachment":[{"href":"https:\/\/machinalogic.com\/dese_staging1\/wp-json\/wp\/v2\/media?parent=4239"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}